int3.architecture

class int3.architecture.architecture.Architecture(name: str, bit_size: int, endian: Endian, insn_width_flavor: InstructionWidth, min_insn_width: int, toolchain_triple: str, qemu_name: str, linux_kernel_name: str, ghidra_name: str, clang_name: str, llvm_reg_prefix: str, keystone_reg_prefix: str, keystone_arch: int, keystone_mode: int, capstone_arch: int, capstone_mode: int, reg_cls: type, reg_clobber_groups: tuple[set[RegisterDef], ...])

Metadata for a specific computing architecture.

Names referring to the same architecture are often fragmented across different low-level tools and libraries (the Linux kernel, LLVM/Clang, Keystone/Capstone, and so on). This class centralizes that information along with the registers belonging to an architecture and other relevant metadata needed for proper code and program generation.

An architecture instance servers as the main interface for size-aware integer packing and unpacking utilities.

An architecture instance also provides the simplest interface for accessing the architecture’s registers and unmasking their aliases and clobbers via the expand_regs and reg methods.

expand_regs(*regs: RegisterDef | str) tuple[RegisterDef, ...]

Expand an input set of registers to include all implicit clobbers.

>>> from int3 import Architectures
>>> x86_64 = Architectures.x86_64.value
>>> sorted([reg.name for reg in x86_64.expand_regs("ebx")])
['bl', 'bx', 'ebx', 'rbx']
is_okay_value(imm: int) bool

Tests whether a value can be represented on this architecture.

pack(value: int, width: int | None = None) bytes

Pack an integer value into bytes.

When width is omitted, the native width of the architecture will be used.

>>> import binascii
>>> from int3 import Architectures
>>> mips = Architectures.Mips.value
>>> binascii.hexlify(mips.pack(0x4141)).decode()
'00004141'
pad(value: bytes, width: int | None = None, fill_byte: bytes = b'\x00') bytes

Pack and pad an integer value to a byte length.

>>> from int3 import Architectures
>>> mips = Architectures.Mips.value
>>> mips.pad(b"AA", fill_byte=b"B")
b'BBAA'
>>> mips.pad(b"AA", width=64, fill_byte=b"C")
b'CCCCCCAA'
reg(name: str) RegisterDef

Resolve a register definition by name.

>>> from int3 import Architectures
>>> x86_64 = Architectures.x86_64.value
>>> x86_64.reg("rax")
RegisterDef(name='rax', bit_size=64, llvm_alt_name=None)
unpack(data: bytes, width: int | None = None, signed: bool = False) int

Unpack bytes into an integer for this architecture.

When width is omitted, the native width of the architecture will be used.

>>> from int3 import Architectures
>>> mips = Architectures.Mips.value
>>> hex(mips.unpack(b"AA", width=16))
'0x4141'
class int3.architecture.architecture.Architectures(*values)

Interface for accessing supported Architecture definitions.

>>> from int3 import Architectures
>>> sorted([arch.name for arch in Architectures])
['Mips', 'x86', 'x86_64']
static from_host() Architecture

Derive an architecture from the host.

static from_str(architecture_name: str) Architecture

Derive an architecture from a string name.

>>> from int3 import Architectures
>>> Architectures.from_str("mips").name
'mips'
static names() list[str]

Retrieve the names of all supported architectures.

class int3.architecture.registers.RegisterDef(name: str, bit_size: int, llvm_alt_name: str | None = None)

Metadata for an architecture’s specific register.

>>> from int3 import Registers
>>> Registers.Mips.zero
RegisterDef(name='zero', bit_size=32, llvm_alt_name='0')
class int3.architecture.registers.Registers

Primary interface for accessing architecture-specific register sets.

>>> from int3 import Registers
>>> Registers.x86.eax
RegisterDef(name='eax', bit_size=32, llvm_alt_name=None)
>>> Registers.Mips.a0
RegisterDef(name='a0', bit_size=32, llvm_alt_name='4')
class int3.architecture.endian.Endian(*values)

Big or little endian.

Big = 1
Little = 2
class int3.architecture.instruction_width.InstructionWidth(*values)

Fixed or variable instruction width.

Fixed = 2
Variable = 1